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VeriTiger®-V19P

FPGA Number：1 Dimensions: L223mm, W340mm, H95mm Weight: 3.5 Kg Max Power Consumption: 120W

VeriTiger®-DV19P

FPGA Number：：2 Dimensions: L447mm, W340mm, H95mm Weight: 6.8 Kg Max Power Consumption: 240W

VeriTiger®-QV19P

FPGA Number：4 Dimensions: L444mm, W678mm, H95mm Weight: 13.6 Kg Max Power Consumption: 480W

Larger capacity, More scalable

Based on Xilinx Virtex UltraScale+ XCVU19P FPGA, which provides the highest logic density and I/O count on a single device ever built by Xilinx. Provide flexible expansion for designs of various sizes, applications and stages，such as single FPGA system for high-performance IP prototyping and multiple FPGAs system for advanced SoC prototyping.

Higher Performance, Exponentially Faster

Provide high performance interfaces for data transmission between host and VeriTigers and debug signal capture. Provide 44 lanes GTY transceivers which deliver highest possible transceiver speeds and are ideal for the interconnect between FPGAs and perfect for high-performance IP and SoC prototyping. VeriTiger-V19P runs up to 100 MHz for advanced IC design.

Rich Connectivity and 100+ Daughter Cards

Rich Connectivity is built in VeriTiger-V19Ps for 100+ ready daughter cards provided by HyperSilicon®. Flexible interfaces deliver high flexibility for clocking, debug and host interface, hsDman, the daughter card management software researched and developmented by HyperSilicon®, can effectively monitor and manage abundant daughter cards.

Firmware Upgraded for Stronger Running Protection

Greater height and more ventilation holes were considered to improve the heat dissipation capability of the VeriTiger-V19Ps system. Brand new hardware structure, high quality materials and advanced manufacturing process enhance the reliability of system operation and prolonging the service life.

Key Parameters

Product model	Capacity	FPGA RAM	DSP Slices	User IOs	Memory Support
VeriTiger®-QV19P	~196M ASIC Gate	663.6Mb	15360	6576	DDR48, DDR48/DDR3*8
VeriTiger®-DV19P	~ 98M ASIC Gate	331.8Mb	7680	3288	DDR44, DDR44/DDR3*4
VeriTiger®-V19P	~ 49M ASIC Gate	165.9Mb	3840	1644	DDR42, DDR42/DDR3*2

Highlights

Partition

DeepDebug

Can Be Used as Emulator

hsSynth

hsSynth innovates a new way to segment the large-scale design into specified amount modules, and then parallel compile these modules to achieve multifold speed-up of the synthesis process. Only the modified sub-modules will be re-synthesized when the design iterated, which greatly shortens the iterative synthesis process. For multiple iterations in the design, hsSynth only needs to re-synthesize the sub-modules of the iterations, which greatly accelerates the iterative synthesis process. At the same time, hsSynth provides a "top-down" synthesis mode for FPGA prototype verification to obtain the highest running speed and maximum utilization efficiency of FPGA. Provides a "Bottom-up" synthesis mode for emulation to achieve the maximum consistency with RTL code and maximum debug visibility.

Highlights

Top-down

Bottom-up

Incremental

Multifold Speed-up

ProtoWizard®

ProtoWizard® is the runtime software researched and developmented by HyperSilicon® to manage prototyping resource. ProtoWizard® delivers high performance in environment construction, resource management, security monitoring, system configuration, etc. in the process of FPGA prototyping. It helps users establish the prototyping environment efficiently and reduces bring-up time.

Highlights

Multi-Users

Remote Control

Online Update

Hardware Self-Test

hsDman

hsDman is the daughter card management software researched and developmented by HyperSilicon® for our ready daughercards provided to users. hsDman monitors and manages the present 100+ daughter cards effectively and assists verification team to save prototype development costs and resources.

Highlights

Pin Mapping

Daughter Card Library

Mother Board Library

Transfer Card Library

hsTrace

Compared with FPGA integrated logic analyzer which delivery a poor sampling depth and transmission speed due to the waveform data occupies FPGA RAM, hsTrace deep debug tool includes many advanced features, including the sampled data is stored in an external DDR，the waveform data is transfered through ethernet to PC rapidly and provide up to 1G data dump depth.

Highlights

External RAM

Transfer by Ethernet

UP to 1G Dump Depth

Daughter cards play an important role in assisting functional verification, which deliver a great flexibility for more types of designs prototyping. With the continuous expansion of SoC/ASIC design verification demand, requirement for more types of daughter cards is constantly emerging. In addition to providing more than 100 ready daughter cards, we also provide professional and rapid daughter cards design services.